Explore 3 python programmer jobs from 3 hiring companies in Morgan Hill, CA, US. Filter by remote, salary, experience, and company, then open any listing to apply.

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Python Programmer Jobs

Ascendis Pharma

Microchip Technology

Hybrid

Onsite

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our <a href="https://www.microchip.com/en-us/about/careers/mission-and-values" target="_blank">Vision, Mission, and 11 Guiding Values</a>; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over <a href="https://www.microchip.com/en-us/about/investors" target="_blank">30 years of quarterly profitability</a> without a great team dedicated to empowering innovation. People like you.Visit our <a href="https://www.microchip.com/en-us/about/careers/working-here" target="_blank">careers</a> page to see what exciting opportunities and company <a href="https://www.microchip.com/en-us/about/careers/working-here" target="_blank">perks</a> await!Job Description:Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.Microchip is a major supplier of low-power and highly reliable field-programmable gate arrays (FPGAs), a type of programmable logic chip. Our FPGAs are used in a wide variety of applications, including embedded vision; digital signal processing; machine learning; industrial and medical equipment; and satellites. Microchip is also a pioneer in embedding RiscV processors in FPGAs. Microchip Technology Inc. has a Senior Technical Staff Engineer-Design opening based in San Jose, California. This position is in the Solutions Development team of Microchip’s FPGA Division and the successful applicant will work as part of a core team that develops future FPGA fabric architectures and collaborates with the design engineers to develop, verify, and integrate the fabric architecture with other device components such as IO, hard IP blocks, configuration, and security.Responsibilities:<ul><li>Architect and Develop Microchip FPGA based solutions that support a wide range of applications across communications, industrial, and aerospace</li><li>Develop example FPGA application benchmarks, either by coding them in RTL, using state-of-the-art high-level synthesis tools, or developing algorithms to generate them automatically</li><li>Work with various groups across the company, including Marketing, Software Engineering, Circuit Design to come up with innovative FPGA solutions that will grow our market reach and Microchip FPGA adoption. This broad organizational exposure will provide an unusual opportunity for learning and advancement.</li><li>Work with global teams to help drive successful execution of Microchip FPGA solutions</li><li>Collaborate with customers on customer projects, providing support in resolving complex FPGA design challenges, including RTL debugging, and board-level diagnostics</li></ul>Requirements/Qualifications:<ul><li>Bachelor’s/Master’s in Computer Engineering or Electrical Engineering</li><li>At least 15&#43; years relevant work experience in programmable architectures, applications implementation</li><li>Practical coding experience in Verilog/VHDL, Python, or C/C&#43;&#43;, demonstrated in prior work experience</li><li>Clear understanding of digital logic design concepts, developing functional simulation test benches at both system level and block level, developing timing constraints and closing timing, designing circuits for low power</li><li>Ability to read board level schematics and working with various lab equipment such as oscilloscopes, logic/bus analysers</li><li>Collaborative approach with the ability to build strong and deep relationships both within the team and across the organization to drive results</li><li>Outstanding oral and written communication skills</li></ul>Preferred Qualifications:<ul><li>This senior role will have influence over future solutions development and so experience in FPGA or ASIC based Systems Design is a desirable pre-requisite</li></ul>Travel Time:0% - 25%Physical Attributes:Feeling, Hearing, Other, Seeing, Talking, Works Alone, Works Around OthersPhysical Requirements:10% walking, 10% standing, 80% sitting; 100% in doors; Usual business hoursPay Range:We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:<a href="https://www.microchip.com/en-us/about/careers/working-here" target="_blank">Benefits of working at Microchip</a>The annual base salary range for this position, which could be performed in the US, is $91,000 - $247,000.*<div>*Range is dependent on numerous factors including job location, skills and experience.</div>Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law. For more information on applicable equal employment regulations, please refer to the <a href="https://www.eeoc.gov/poster" target="_blank">Know Your Rights: Workplace Discrimination is Illegal Poster</a>.To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Senior Technical Staff Engineer - Design

Senior Technical Staff Engineer

15+ years in programmable architectures; Verilog/VHDL, Python or C/C++; digital logic design; RTL/board-level debugging; strong communication.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.   THE ROLE:As a member of the Front-End Verification team, you will play a critical role in validating the functional correctness of next-generation AMD/Xilinx programmable devices. Working across a multi-site, global engineering organization, you will drive high-quality verification execution from feature definition through silicon readiness.  THE PERSON:You are passionate about digital design and advanced verification methodologies. You thrive in collaborative, cross-functional environments and communicate effectively across sites and time zones. With strong analytical and problem-solving skills, you take ownership of complex technical challenges and are motivated to continuously learn and improve.  KEY RESPONSIBILITIES:  <ul style="margin-bottom: 0in; margin-top: 0px;"><li style="vertical-align: middle; margin: 0in 0in 0in 0px; font-size: 12pt; font-family: Aptos, sans-serif;">Collaborate with architects, hardware and firmware engineers to understand the new features to be verified </li><li style="vertical-align: middle; margin: 0in 0in 0in 0px; font-size: 12pt; font-family: Aptos, sans-serif;">Take ownership of block level verification tasks</li><li style="vertical-align: middle; margin: 0in 0in 0in 0px; font-size: 12pt; font-family: Aptos, sans-serif;">Define test plans, test benches, and tests using System Verilog and UVM</li><li style="vertical-align: middle; margin: 0in 0in 0in 0px; font-size: 12pt; font-family: Aptos, sans-serif;">Debug RTL and Gate simulations and work with HW and SW development teams to verify fixes</li><li style="vertical-align: middle; margin: 0in 0in 0in 0px; font-size: 12pt; font-family: Aptos, sans-serif;">Review functional and code coverage metrics to meet the coverage requirements</li><li style="vertical-align: middle; margin: 0in 0in 0in 0px; font-size: 12pt; font-family: Aptos, sans-serif;">Develop and improve existing verification flows and environments</li></ul>  PREFERRED EXPERIENCE:  <ul style="margin-bottom: 0in; margin-top: 0px;"><li style="vertical-align: middle; margin: 0in 0in 0in 0px; font-size: 12pt; font-family: Aptos, sans-serif;">Strong understanding of computer architecture and logic design</li><li style="vertical-align: middle; margin: 0in 0in 0in 0px; font-size: 12pt; font-family: Aptos, sans-serif;">Knowledge of Verilog, system Verilog and UVM is a must</li><li style="vertical-align: middle; margin: 0in 0in 0in 0px; font-size: 12pt; font-family: Aptos, sans-serif;">Strong understanding of state of the art verification techniques, including assertion and constraint-random metric-driven verification</li><li style="vertical-align: middle; margin: 0in 0in 0in 0px; font-size: 12pt; font-family: Aptos, sans-serif;">Working knowledge of C/C++ and Assembly programming languages</li><li style="vertical-align: middle; margin: 0in 0in 0in 0px; font-size: 12pt; font-family: Aptos, sans-serif;">Exposure to scripting (python preferred) for post-processing and automation</li><li style="vertical-align: middle; margin: 0in 0in 0in 0px; font-size: 12pt; font-family: Aptos, sans-serif;">Experience with gate level simulation, power and reset verification  </li></ul> ACADEMIC CREDENTIALS:  <ul style="margin-bottom: 0in; margin-top: 0px;"><li style="vertical-align: middle; margin: 0in 0in 0in 0px; font-size: 12pt; font-family: Aptos, sans-serif;">Bachelors or Masters degree in computer engineering/Electrical Engineering or a related field</li></ul> LOCATION: San Jose, CA  #LI-DW1#LI-HYBRID This role is not eligible for visa sponsorship. Benefits offered are described:  <a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a> This posting is for an existing vacancy.

Silicon Design Verification Engineer

Frontend verification engineer to validate functional correctness of AMD/Xilinx programmable devices; requires Verilog/SystemVerilog/UVM, C/C++, Python; Bachelor’s or Master’s in Computer/Electrical Engineering or related field.

Ascendis Pharma is a dynamic, fast-growing global biopharmaceutical company with locations in Denmark, Europe, and the United States. Today, we're advancing programs in Endocrinology Rare Disease and Oncology.Here at Ascendis, we pride ourselves on exceptional science, visionary leadership, and skilled and passionate colleagues.Guided by our core values of Patients, Science, and Passion, we use our TransCon® drug development platform to fulfill our mission of developing new and potentially best-in-class therapies to address unmet medical needs.Our culture fosters a place where skilled, adaptable, and highly resourceful professionals can truly make their mark. We offer a dynamic workplace for employees to grow and develop their skills.The Senior Manager, Statistical Programming, will be expected to provide timely and strategic programming support to clinical study teams in alignment with project goals. This role combines hands-on programming responsibilities with leadership in study execution and tool development.The successful candidate will serve as the Statistical Programming Lead for one or more clinical trials, taking responsibility for all programming deliverables from study start through regulatory submission. In addition, this person will support the development and maintenance of departmental programming tools, such as standard macros and specification templates of SDTM and ADaM used across clinical studies.This position requires expertise in CDISC standards (SDTM, ADaM), strong communication and leadership skills, and a deep understanding of clinical trial data and analysis workflows. This position is based in Palo Alto, CA or may be remote.Key Responsibilities<ul><li>Serve as the Statistical Programming Lead for clinical trials, overseeing all programming deliverables from study start to submission.</li></ul><ul> <li>Represent Statistical Programming in cross-functional study team meetings and contribute to project planning and timelines.</li> <li>Develop, validate, and maintain SDTM and ADaM datasets, following CDISC standards and study specifications.</li> <li>Generate or validate tables, listings, and figures (TLFs) for clinical study reports, ISS/ISE, and regulatory submissions.</li> <li>Support statisticians with planned and ad hoc analyses.</li> <li>Develop and maintain reusable macros, templates, and specification tools to support consistent and efficient programming practices across studies.</li> <li>Collaborate with cross-functional teams including Biostatistics, Data Management, and Medical Writing to ensure high-quality deliverables.</li> <li>Ensure programming activities meet project timelines and quality expectations, following internal SOPs and industry best practices.</li> </ul>

Senior Manager, Statistical Programming - Job ID: 1646

Senior Manager, Statistical Programming

Bachelor’s or Master’s in a related field; 10+ years (Bachelor) or 7+ years (Master) of programming in pharma; lead programmer; CDISC SDTM/ADaM; SAS; R/Python a plus; develop reusable macros; strong communication.

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