Posted 5y ago

Sr. Engineer - ASIC PD

@ Arrow Electronics
Ahmedabad or Pune
OnsiteFull Time
Responsibilities:plan floorplanning, optimize timing, verify blocks
Requirements Summary:ASIC physical design: floorplanning, timing, synthesis, verification, STA, ECO, DFT, clock tree, routing, extraction, timing closure; block-level P&R from netlist to GDS.
Technical Tools Mentioned:EDA tools, GDSII, DFT tools, Timing analysis tools
Save
Mark Applied
Hide Job
Report & Hide
Job Description

Position:

Sr. Engineer - ASIC PD

Job Description:

Engineer will be responsible for working with teams on floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, signal integrity, physical verification and DFM
*Engineer will be responsible for working with teams on executing the block level place and route assignments from Netlist through GDS flow
*Interacting with design team with purpose to solve problems and propose physical design engineering ideas.
* To Coordinate all timing budgeting required for physical design task with respective teams
* To close STA timing across all corners and modes for blocks and should be able to generate ECO independently .

Location:

IN-GJ-Ahmedabad, India-Ognaj (eInfochips)

Time Type:

Full time

Job Category:

Engineering Services