Posted 1mo ago

Senior RFIC Layout Engineer

@ Falcomm
Atlanta, Georgia, United States
OnsiteFull Time
Responsibilities:Layout RF/analog ICs, Translate schematics to layouts, Coordinate tape-out
Requirements Summary:5+ years RFIC/analog IC layout experience; Bachelor's in EE/CS/related; onsite in Atlanta.
Technical Tools Mentioned:RFIC layout tools, foundry design rule checks, parasitic extraction, DRC, LVS
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Job Description

Are you passionate about designing advanced semiconductor layouts that enable next-generation wireless technologies? At Falcomm, we are transforming innovative semiconductor research into real-world solutions through high-performance, energy-efficient RF power amplifier technologies. Our mission is to deliver cutting-edge wireless solutions that push the boundaries of efficiency, integration, and performance.

Falcomm is seeking a Senior RFIC Layout Engineer to support the physical implementation of RF and mmWave integrated circuits. This role focuses on developing high-quality IC layouts for RF front-end circuits while ensuring compliance with foundry design rules and performance requirements. The position requires close collaboration with RFIC designers, verification teams, and fabrication partners to ensure successful tape-out and silicon performance.


Responsibilities:

  • Develop and implement layout for RF and analog integrated circuits including amplifiers, mixers, oscillators, and supporting RF blocks.
  • Work closely with circuit designers to translate schematics into optimized physical layouts that meet performance and area requirements.
  • Ensure layouts comply with foundry design rules and support design verification processes including DRC, LVS, and parasitic extraction.
  • Optimize layout for RF performance, signal integrity, matching, and noise isolation.
  • Support tape-out preparation and coordinate with fabrication partners during the manufacturing process.
  • Collaborate with cross-functional teams including RF design, packaging, and testing.
  • Document layout methodologies and contribute to best practices for RFIC physical design.