Posted 1mo ago

R&D Engineering, Architect

@ Synopsys
Sunnyvale, California, United States
$208k-$312k/yrOnsiteFull Time
Responsibilities:Designing protocols, Developing RTL, Debugging firmware
Requirements Summary:Lead architect for FPGA design and protocol integration; 12+ years in FPGA/PCIe/CXL; strong RTL, firmware, and system-level validation.
Technical Tools Mentioned:PCIe, CXL, RTL, FPGA, Emulation, HAPS, ZeBu, DUT, Firmware
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Job Description
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are a visionary engineering leader with deep expertise in FPGA design and advanced protocol integration, ready to architect and deliver solutions that bridge real-world interfaces with cutting-edge emulation and prototyping platforms. You thrive in environments where complex system-level challenges are solved collaboratively, and your technical acumen is matched by your passion for innovation. You have extensive hands-on experience with PCIe and/or CXL protocols, and you understand the importance of robust, high-fidelity validation in semiconductor product development. You are comfortable navigating the intricacies of RTL development, firmware integration, and hardware/software interaction, and you bring a holistic perspective to system architecture. Your communication skills enable you to lead technical discussions across global, cross-functional teams, and you are adept at supporting customers through intricate system bring-up and debug. You are excited by the opportunity to influence the roadmap for next-generation protocols and contribute to patent-pending technologies that set industry standards. Your drive for continuous learning keeps you at the forefront of emerging trends in hardware-assisted verification, and you are committed to mentoring and inspiring others within the team. You value diversity of thought and experience, and you approach every challenge with curiosity, resilience, and a collaborative spirit.
What You’ll Be Doing:
Designing, developing, and maintaining Speed Adapter solutions for advanced protocols, including PCIe and CXL.
Implementing protocol functionality on FPGA-based platforms to bridge real-world I/O with DUTs running at reduced speeds on emulation and prototyping systems.
Collaborating with IP, emulation, and prototyping teams to deliver comprehensive, end-to-end system-level validation solutions.
Developing and debugging RTL, firmware, and system-level components for Speed Adapter products.
Supporting seamless integration with ZeBu™ and HAPS® platforms, including creating example designs and reference flows.
Participating in customer escalations, conducting root-cause analysis, and delivering solutions for complex system-level issues.
Contributing to roadmap planning, feature definition, and technical differentiation versus competitive solutions.
The Impact You Will Have:
Enable customers to connect pre-silicon designs to real devices, testers, and hosts with unmatched fidelity and performance.
Advance industry-leading system-level validation technology for top semiconductor and hyperscale customers.
Shape the adoption and implementation of next-generation protocols such as PCIe Gen6/Gen7 and CXL3.x/4.0.
Drive innovation in hardware-assisted verification, influencing patent-pending technologies that differentiate Synopsys solutions.
Enhance integration across IP, emulation, prototyping, and real-world connectivity to deliver robust validation platforms.
Support global teams and customers, fostering technical excellence and collaborative problem-solving.
What You’ll Need:
12 years+ relevant experience
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
Strong hands-on experience with PCIe and/or CXL protocols, including implementation and debugging.
Solid understanding of digital design, RTL development, and FPGA-based systems.
Experience with system-level validation, emulation, or prototyping environments.
Familiarity with high-speed serial interfaces and real-world I/O connectivity.
Strong debugging skills across RTL, firmware, and hardware/software boundaries.
Ability to work effectively in a cross-geography, cross-functional team.
Who You Are:
Innovative thinker with a strategic mindset.
Collaborative team player who values diverse perspectives.
Excellent communicator and technical mentor.
Resilient problem-solver, able to navigate ambiguity and complexity.
Customer-focused, with a commitment to delivering high-impact solutions.
Adaptable and proactive, eager to stay ahead in a fast-evolving technology landscape.
The Team You’ll Be A Part Of:
You’ll join the Speed Adapter engineering team within Synopsys’ HW-Assisted Verification (HAV) organization. This talented group is dedicated to developing and deploying industry-leading Speed Adapter solutions that bridge advanced protocols and real-world interfaces with ZeBu™ emulation and HAPS® prototyping platforms. The team collaborates globally across IP, emulation, and prototyping domains to deliver robust, high-performance system validation solutions, directly impacting the success of top semiconductor and hyperscale customers.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.