Mobileye's EyeQ Platform Group (EPG) is seeking a motivated Formal Verification Engineer to join our team and contribute to development of hardware verification environments.
This position offers an opportunity to apply formal methods to verify the correctness of various complex digital systems.
This is an exciting opportunity to join a team of talented engineers, working cutting edge technologies in the field of autonomous vehicle.


What will your job look like:

Be the owner of formal verification environment from first draft to sign-off stage

Apply formal methods to verify the correctness of various complex digital systems

Work with HW architects\designers to define assumptions, rules and cover properties

Help define the formal verification methodology and environment to be applied by the team

Explore new Formal methods and Tools

Work with tools like Cadence JasperGold, Verisium manager, Xcelium, Indago

Analyze verification results, identify bugs, and collaborate with engineers to resolve design issues

Develop generic formal blocks\functions of commonly used logic, to be later used off the shelf

All you need is:

BSc in electrical engineering, computer engineering, or computer science

Passion for the field of Formal Verification

5+ years of experience in Formal Verification

Experience coding system-verilog hardware description language

Experience with scripting languages (e.g. python, tcl )

Strong analytical and problem solving skills

Ability to work independently and in a team-oriented environment