Posted 4y ago

MTS Physical Design Engineer (158322)

@ AMD
Shanghai, Shanghai, China
OnsiteFull Time
Responsibilities:floorplan design, signoff process, project delivery
Requirements Summary:Experience in large-scale ASIC physical design, floorplanning, MFT, PIN, SSB, repeater; strong leadership and cross-functional collaboration; fluent English; team player.
Technical Tools Mentioned:ICC2, Unix, Scripting, Python
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Job Description

Career Opportunities: MTS Physical Design Engineer (158322)

Requisition ID 158322 - Posted  - China - Shanghai - Shanghai - Regular Salaried









































 

What you do at AMD changes everything

We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team.

AMD together we advance_

 

Physical Design Engineer

 

THE ROLE:

Work with global physical design team for large scale ASIC chip physical implementation. Focus on top level design for deep sub-micron chips. The individual is also expected to be accountable for project delivery

 

THE PERSON:

  • Hands on experience in large scale ASIC chip physical design
  • Knowledgeable in all aspects of deep submicron ASIC design top level planning, include floorplan, MFT, PIN, SSB, Repeater.
  • Successfully gone through several complete product development cycles
  • Demonstrate strong leadership and work well with cross-functional teams
  • Good listening, writing and speaking English
  • Good communication skills, strong interpersonal skills and the flexibility
  • Dedicated, hard-working and good team player

 

KEY RESPONSIBILITIES:

  • Top level floorplan and signoff for deep sub-micron chips

 

PREFERRED EXPERIENCE:

  • Familiar with Back-End (physical design) EDA tools, ICC2
  • Familiar with Unix/Linux environment and good at scripts

 

ACADEMIC CREDENTIALS:

  • MSEE with 5+ years or Bachelor with 7+ years of industrial experience in ASIC design
  • 2+ years or more years of experience in physical design of deep submicron digital ASIC chips

LOCATION:

China, Shanghai

#LI-JG2



Requisition Number: 158322 
Country/Region/Location: China State/Province: Shanghai City: Shanghai 
Job Function: 
Design  








 




































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Requisition ID 158322 - Posted  - China - Shanghai - Shanghai - Regular Salaried

What you do at AMD changes everything

We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team.

AMD together we advance_

 

Physical Design Engineer

 

THE ROLE:

Work with global physical design team for large scale ASIC chip physical implementation. Focus on top level design for deep sub-micron chips. The individual is also expected to be accountable for project delivery

 

THE PERSON:

  • Hands on experience in large scale ASIC chip physical design
  • Knowledgeable in all aspects of deep submicron ASIC design top level planning, include floorplan, MFT, PIN, SSB, Repeater.
  • Successfully gone through several complete product development cycles
  • Demonstrate strong leadership and work well with cross-functional teams
  • Good listening, writing and speaking English
  • Good communication skills, strong interpersonal skills and the flexibility
  • Dedicated, hard-working and good team player

 

KEY RESPONSIBILITIES:

  • Top level floorplan and signoff for deep sub-micron chips

 

PREFERRED EXPERIENCE:

  • Familiar with Back-End (physical design) EDA tools, ICC2
  • Familiar with Unix/Linux environment and good at scripts

 

ACADEMIC CREDENTIALS:

  • MSEE with 5+ years or Bachelor with 7+ years of industrial experience in ASIC design
  • 2+ years or more years of experience in physical design of deep submicron digital ASIC chips

LOCATION:

China, Shanghai

#LI-JG2



Requisition Number: 158322 
Country/Region/Location: China State/Province: Shanghai City: Shanghai 
Job Function: 
Design  

Email this job to a friend
 
The job has been sent to
 
The job has been sent to

What you do at AMD changes everything

We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team.

AMD together we advance_

 

Physical Design Engineer

 

THE ROLE:

Work with global physical design team for large scale ASIC chip physical implementation. Focus on top level design for deep sub-micron chips. The individual is also expected to be accountable for project delivery

 

THE PERSON:

  • Hands on experience in large scale ASIC chip physical design
  • Knowledgeable in all aspects of deep submicron ASIC design top level planning, include floorplan, MFT, PIN, SSB, Repeater.
  • Successfully gone through several complete product development cycles
  • Demonstrate strong leadership and work well with cross-functional teams
  • Good listening, writing and speaking English
  • Good communication skills, strong interpersonal skills and the flexibility
  • Dedicated, hard-working and good team player

 

KEY RESPONSIBILITIES:

  • Top level floorplan and signoff for deep sub-micron chips

 

PREFERRED EXPERIENCE:

  • Familiar with Back-End (physical design) EDA tools, ICC2
  • Familiar with Unix/Linux environment and good at scripts

 

ACADEMIC CREDENTIALS:

  • MSEE with 5+ years or Bachelor with 7+ years of industrial experience in ASIC design
  • 2+ years or more years of experience in physical design of deep submicron digital ASIC chips

LOCATION:

China, Shanghai

#LI-JG2



Requisition Number: 158322 
Country/Region/Location: China State/Province: Shanghai City: Shanghai 
Job Function: 
Design