Posted 2w ago

Lead Software Engineer (Synthesis software)

@ Cadence Design Systems
Shanghai, Shanghai, China
OnsiteFull Time
Responsibilities:developing synthesis, optimizing performance, implementing features
Requirements Summary:Bachelor or Master in EE/CS/CE; 3-5 years experience; proficient in C/C++, Verilog/SV/VHDL/SystemC; RTL modeling with BFMs; UVM/SC/TLM; EDA/CAD tools; AI tools like Copilot or Claude; strong communication and multi-site collaboration.
Technical Tools Mentioned:C++, Verilog, VHDL, SystemC, UVM, SC/TLM, EDA/CAD Tools, Copilot, Claude
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Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

We are looking for a Lead Software Engineer to work in a team-oriented environment to develop and maintain advanced synthesis technology

The candidate will be responsible for development and maintenance of the synthesis technology for Palladium & Protium.

He will be implementing new VHDL/Verilog construct & feature support in synthesizer.

He will be working on logic optimization and performance improvement in synthesizer. 

  

   

Position Requirements:

1. This position requires a Bachelor or Master's degree in EE/CS/CE with 3-5 years of industry experience.

2. Candidate should be proficient with C/C++, Operating system concepts.

3. Design modeling using Verilog/SV, VHDL or SysC.

4. Knowledge and experience in RTL modeling of BFMs along with exposure to verification methodologies using UVM and SC/TLM is preferable.

5. EDA/CAD tool development experience or logic design verification experience is highly preferred.

6. Knowledge and experience in AI tools like Copilot or Claude code is preferred.

7. Requires good communication skills, attention to details, and ability to work in multi-site/multi-person project.

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