Alternate Job Titles:
DFT Senior Engineer
Design for Testability Specialist
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology powers chip design, verification, and IP integration, enabling the creation of high-performance silicon chips and software. Join us to transform the future through continuous technological innovation.
You Are:
You’re a driven engineer, passionate about chip testability and reliability. Whether just starting out or bringing senior expertise, you thrive in collaborative environments, enjoy solving technical challenges, and are eager to learn and share knowledge. You value innovation and want to make a real impact in advanced semiconductor projects.
What You’ll Be Doing:
Own DFT tasks: scan chain stitching, ATPG, simulation
Create timing constraints for mission and DFT modes
Work with design and implementation teams
Support customer IP integration and silicon bring-up
Automate workflows with scripting
Mentor junior team members (senior roles)
The Impact You Will Have:
Enhance IP core testability and quality
Accelerate time-to-market for new chipsets
Facilitate seamless SoC integration
Promote best practices and team growth
Advance DFT methodologies at Synopsys
Support customers during silicon bring-up
What You’ll Need:
Degree in Electronics, Electrical Engineering, or related field
No DFT experience required for junior roles; 2+ years for senior roles
Knowledge of scan insertion, ATPG, JTAG
Experience with Synopsys tools (Design Compiler, VCS, TetraMAX) preferred
Scripting skills (Perl, TCL, Python)
Who You Are:
Analytical, detail-oriented, proactive
Collaborative and communicative
Adaptable and eager to learn
The Team You’ll Be A Part Of:
Join a skilled DFT engineering team that values collaboration, innovation, and technical excellence. Benefit from mentorship and tackle industry-leading challenges together.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will share more about salary and benefits during the process.
DFT Senior Engineer
Design for Testability Specialist
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology powers chip design, verification, and IP integration, enabling the creation of high-performance silicon chips and software. Join us to transform the future through continuous technological innovation.
You Are:
You’re a driven engineer, passionate about chip testability and reliability. Whether just starting out or bringing senior expertise, you thrive in collaborative environments, enjoy solving technical challenges, and are eager to learn and share knowledge. You value innovation and want to make a real impact in advanced semiconductor projects.
What You’ll Be Doing:
Own DFT tasks: scan chain stitching, ATPG, simulation
Create timing constraints for mission and DFT modes
Work with design and implementation teams
Support customer IP integration and silicon bring-up
Automate workflows with scripting
Mentor junior team members (senior roles)
The Impact You Will Have:
Enhance IP core testability and quality
Accelerate time-to-market for new chipsets
Facilitate seamless SoC integration
Promote best practices and team growth
Advance DFT methodologies at Synopsys
Support customers during silicon bring-up
What You’ll Need:
Degree in Electronics, Electrical Engineering, or related field
No DFT experience required for junior roles; 2+ years for senior roles
Knowledge of scan insertion, ATPG, JTAG
Experience with Synopsys tools (Design Compiler, VCS, TetraMAX) preferred
Scripting skills (Perl, TCL, Python)
Who You Are:
Analytical, detail-oriented, proactive
Collaborative and communicative
Adaptable and eager to learn
The Team You’ll Be A Part Of:
Join a skilled DFT engineering team that values collaboration, innovation, and technical excellence. Benefit from mentorship and tackle industry-leading challenges together.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will share more about salary and benefits during the process.