Posted 2y ago

Senior Hardware Engineer - Micro-Architect

@ Quadric
Burlingame, California, United States
OnsiteFull Time
Responsibilities:define architecture, own microarchitecture, optimize PPA
Requirements Summary:BS/MS/Ph.D. in Electrical or Computer Engineering; 5+ years in CPU/GPU/ASIC front-end design; SystemC/SystemVerilog/Verilog; strong computer architecture; low-power digital design; VCS and Verilog/C Co-Sim; data-parallel hardware; FPGA design a plus; logic synthesis and performance modeling.
Technical Tools Mentioned:SystemC, SystemVerilog, Verilog, VCS, C, C++, RTL, Power-Performance-Area (PPA) optimization
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Job Description

Quadric has created an innovative general purpose neural processing unit (GPNPU) architecture. Quadric's co-optimized software and hardware is targeted to run neural network (NN) inference workloads in a wide variety of edge and endpoint devices, ranging from battery operated smart-sensor systems to high-performance automotive or autonomous vehicle systems. Unlike other NPUs or neural network accelerators in the industry today that can only accelerate a portion of a machine learning graph, the Quadric GPNPU executes both NN graph code and conventional C++ DSP and control code.

Role:

This is a rare opportunity to get in on the ground floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will contribute to all stages of the processor design cycle.