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Posted 1w ago

Electromagnetic Engineer, Superconducting Qubit Package Modeling

@ Google
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Goleta, California, United States
$159k-$231k/yrOnsiteFull Time
Responsibilities:develop models, conduct measurements, analyze data
Requirements Summary:Bachelor's in CS/Physics/related field; 5y HFSS/3D layout; 5y VNA/TDR; 5y microwave theory; 3y Python for SI data.
Technical Tools Mentioned:HFSS, CST Studio Suite, Vector Network Analyzer, Time Domain Reflectometer, Python
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Job Description

Minimum qualifications:

  • Bachelor's degree in Computer Science, Physics, a related technical field or equivalent practical experience.
  • 5 years of experience in Ansys HFSS (including 3D Layout and Mesh optimization) or similar full-wave solvers.
  • 5 years of experience with characterization equipment: including Advanced Vector Network Analyzer (VNA) techniques (e.g., pulse measurements, cryogenic calibration) and Time Domain Reflectometry (TDR) for impedance profiling and fault isolation.
  • 5 years of experience working in transmission line theory, S-parameters, Smith Charts, and microwave circuit theory.
  • 3 years of experience working with Python for Signal Integrity data analytics and tool automation.

Preferred qualifications:

  • PhD in a quantitative discipline such as Statistics, Engineering, Physics or Mathematics.
  • Experience in superconducting qubit design, including Hamiltonian modeling, Josephson junctions, and microwave cavity analysis via eigenmode solvers.
  • Experience in Signal Integrity (SI)/Power Integrity (PI) and Electromagnetic Interference (EMI)/Electromagnetic Compatibility (EMC) debugging to ensure clean high-frequency performance and low-noise environments.
  • Experience with dilution refrigerators and the integration of cryogenic microwave chains (isolators, and circulators).
  • Knowledge of microfabrication and 3D integration techniques, including flip-chip bonding, TSVs, and superconducting interposers.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As an Electromagnetic (EM) Engineer focusing on quantum chip packaging, you will be responsible for the EM modeling and validation of next-generation packages and interconnects to optimize their designs. You will use cryogenic microwave measurements and mechanical design inputs to construct high-fidelity 3D electromagnetic models for microwave packages, interconnects, and signal delivery lines. You will operate at the intersection of mechanical and electromagnetic engineering, ensuring that high-speed signals maintain integrity through complex package transitions to the qubit chip.

The full potential of quantum computing will be unlocked with a large-scale computer capable of complex, error-corrected computations. Google Quantum AI's mission is to build this computer and unlock solutions to classically intractable problems. Our roadmap is focused on advancing the capabilities of quantum computing and enabling meaningful applications.

The US base salary range for this full-time position is $159,000-$231,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

  • Develop high-fidelity 3D electromagnetic models of device packages, transitions, and microwave cavities using Ansys High-Frequency Structure Simulator (HFSS) or CST Studio Suite.
  • Conduct high-frequency measurements using Vector Network Analyzer (VNAs) and Time Domain Reflectometer (TDRs) to characterize physical prototypes, in cryogenic set ups.
  • Lead efforts to "close the loop" by correlating empirical lab data with virtual 3D EM models to refine simulation models.
  • Interface with chip designers and packaging teams to provide design guidelines.
  • Perform analyses on package geometries to mitigate discontinuities, return loss, and crosstalk.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.